About Company : Infineon Technologies, Bangalore has established a solid reputation as a leading provider of advanced silicon-proven wireline and wireless ASIC products. Infineon has working products in 65-nm while library development is being done in the latest 45-nm technology.
Infineon Technologies AG, Munich , Germany , offers semiconductor and system solutions addressing three central challenges to modern society: energy efficiency, connectivity and security. In fiscal year 2006 (ending September), the company achieved sales of Euro 7.9 billion (including Qimonda sales of Euro 3.8 billion) with approximately 42,000 employees worldwide (including approximately 12,000 Qimonda employees). With a global presence, Infineon operates through its subsidiaries in the US from Milpitas , CA , in the Asia-Pacific region from Singapore , and in Japan from Tokyo . Infineon is listed on the Frankfurt Stock Exchange and on the New York Stock Exchange (ticker symbol: IFX).
Job Title : Senior Expert Layout Verification Runset Development
Experience : 3 - 6 Years
Job Description : Calibre technology runsets/techfiles development.
Tech. mentoring of junior engineers
runsets/techfiles adaptation to reach design flow compatibility
layout verification on real life examples and test cases
extraction of devices incl. the characteristic parameters
design project support
QA of configuration files/runsets using the target environment/tools.
Desired : 3 yrs+ exp. in PDK development
3 yrs+ exp. in Calibre LVS / DRC rule decks
2 yrs+ exp. AMS macros layout
exp. with extraction tools (CDS Assura)
DSM technology processes, triple well processes like 90nm or 65 nm
MySQL, Perl, Unix, Microsoft Office package.
Location : Bangalore
Apply : Email ur cv to jobs.india(at)infineon.com
Website : www.infineon.com
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